Tutorial Week 10

Questions

    Virtual Memory

  1. Describe a two-level page table and how it is used to translate a virtual address into a physical address.


  2. Given a two-level page table (in physical memory), what is the average number of physical memory accesses per virtual memory access in the case where the TLB has a 100% miss ratio, and the case of a 95% hit ratio


  3. What are the two broad categories of events causing page faults? What other event might cause page faults?


  4. Translate the following virtual addresses to Physical Addresses using the TLB. The system is a R3000. Indicate if the page is mapped, and if so if its read-only or read/write.

    The EntryHi register currently contains 0x00000200.

    The virtual addresses are 0x00028123, 0x0008a7eb, 0x0005cfff,0x0001c642, 0x0005b888, 0x00034000.

    TLB
    EntryHiEntryLo
    0x000282000x0063f400
    0x000342000x001fc600
    0x0005b2000x002af200
    0x0008a1000x00145600
    0x0005c1000x006a8700
    0x0001c2000x00a97600

  5. Describe an inverted page table and how it is used to translate a virtual address into a physical address.


  6. Describe a hashed page table and how it is used to translate a virtual address into a physical address.


  7. Of the three page table types covered in lectures, which ones are most appropriate for large virtual address spaces that are sparsely populated (e.g. many single pages scattered through memory)?


  8. What is temporal and spatial locality?