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School of Computer Science & Engineering
University of New South Wales
Advanced Operating Systems
COMP9242 2002/S2
Next: Hardware cache coherency
Up: 10-smp
Previous: Partial store ordering
- $.$
- Caching can lead to a processor in an SMP system reading stale
data.
- $.$
- Can even happen when reading different data:
- Different data may lie in same cache line!
- $.$
- Need to ensure caches are coherent:
- by software, or
- by hardware (standard these days).
==>- Need cache coherency protocols.
Gernot Heiser
2002-10-11
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