UNSW Computer Science and Engineering Technical Report no. UNSW-CSE-TR-9503
(29 pages: file 9503.pdf)

Title:   Guarded Page Tables on the MIPS R4600

Authors: Jochen Liedtke
         GMD - German National Research Center for Information Technology
         GMD SET-RS, Shloss Birlinghoven
         53757 Sankt Augustin, Germany

E-mail:  jochen.lied@gmd.de

         Kevin Elphinstone
         School of Computer Science and Engineering 
         The University of New South Wales 
         Sydney 2052 Australia 

E-mail:  kevine@vast.unsw.edu.au

Date:    23 November 1995

Communicated by Jayasooriah

Abstract:

 The introduction of 64-bit microprocessors has increased demands
  placed on virtual memory systems. The availability of large address
  spaces has led to a flurry of new applications and operating systems
  that further stress virtual memory systems. Consequently, much
  interest has recently focussed on translation lookaside buffer (TLB)
  performance and page table efficiency. Guarded Page Tables are a
  mechanism for overcoming some of the problems associated with
  conventional page tables.

  Guarded Page Tables are tree structured like conventional page tables.
  Also like conventional pages tables, they have the advantages of
  supporting hierarchical operations and sharing of sub-trees. Unlike
  conventional page tables, guarded page tables implement huge sparsely
  occupied address spaces efficiently. 

  We describe guarded page tables and the associated parsing algorithm.
  R4600 processor dependent micro-optimisation is undertaken and
  presented. R4600 TLB refill is discussed in detail, including a
  comparison of guarded page tables with more convention page tables. A
  software second level TLB is introduced and analysed as a way of
  increasing guarded page table performance.

https://cgi.cse.unsw.edu.au/~reports/papers/9503.pdf