UNSW Computer Science and Engineering Technical Report no. UNSW-CSE-TR-0321
(37 pages: pdf format file 0321.pdf)

Title: A Survey on the Interaction Between Caching, Translation and Protection

Author:  Adam Wiggins
         School of Computer Science and Engineering 
         University of New South Wales
         Sydney 2052 Australia
         E-mail: awiggins@cse.unsw.edu.au

Abstract:

Fine-grained hardware protection could deliver significant benefits to
software, enabling the implementation of strongly encapsulated
light-weight objects, but only if it can be done without slowing down
the processor.

In this survey we explore the interaction between the processor's
caches and virtual memory in traditional as well as research
architectures. We find that while caching and translation mechanisms
have received much attention in the literature, hardware protection
mechanisms have remained largely neglected, with none of the explored
architectures providing truly scalable support for context-sensitive,
fine-grained protection.

Based on the insights gained from the survey we outline an approach
which facilitates the construction of simple, yet fast, low-power
fine-grained protection mechanisms for processor cores.

https://cgi.cse.unsw.edu.au/~reports/papers/0321.pdf