NSW Computer Science and Engineering Technical Report no. UNSW-CSE-TR-0307 (19 pages: file 0307.pdf) Title: Itanium Page Tables and TLB Author: Matthew Chapman, Ian Wienand, Gernot Heiser School of Computer Science and Engineering University of New South Wales Sydney 2052 Australia E-mail: {matthewc, ianw, gernot}@cse.unsw.edu.au Abstract: The Itanium architecture offers considerable flexibility in managing the TLB. Besides features found in many architectures, such as TLB tags and superpages, it supports two quite unusual features. One is the choice of two hardware-walked page table formats, a linear array and a hashed page table. The other is an unusual TLB tagging scheme which, among others, allows a single TLB entry to map a page to several address spaces, thus reducing the consumption of TLB entries in the presence of sharing. Only one page table format, the linear array, is presently supported in Linux. However, this format neither supports the use of arbitrarily mixed page sizes nor the sharing of TLB entries. We have implemented the hashed page table format in Linux and found that this change has negligible performance impact, which should pave the way for exploring an implementation of superpage support. We have also implemented sharing of TLB entries, and found that in normal Linux workloads the effect is somewhere between negligible and a moderate performance increase. We could, however, demonstrate that there are scenarios where TLB sharing can produce significant performance gains. ftp://ftp.cse.unsw.edu.au/pub/doc/papers/UNSW/0307.pdf