1. C++TESK Homepage. Available at
  2. R. Alur & D.L. Dill (1994): A Theory of Timed Automata. Theoretical Computer Science 126(2), pp. 183–235, doi:10.1016/0304-3975(94)90010-8.
  3. C. Andrés, M.G. Merayo & M. Núñez (2012): Formal Passive Testing of Timed Systems: Theory and Tools. Software Testing, Verification & Reliability 22(6), pp. 365–405, doi:10.1002/stvr.1464.
  4. H. Barringer, D. Rydeheard & K. Havelund (2007): Rule Systems for Run-Time Monitoring: From Eagle to RuleR. In: Proceedings of 7th International Workshop on Runtime Verification. Revised Selected Papers, pp. 111–125, doi:10.1007/978-3-540-77395-5_10.
  5. A. Bauer, M. Leucker & C. Schallhart (2011): Runtime Verification for LTL and TLTL. ACM Transactions on Software Engineering and Methodology 20(4), pp. 14:1–14:64, doi:10.1145/2000799.2000800.
  6. B. Bloom & M. Kwiatkowska (1991): Trade-offs in True Concurrency: Pomsets and Mazurkiewicz Traces. Technical Report TR 91-1223. Cornell University.
  7. G. von Bochmann, S.Haar, C.Jard & G.-V. Jourdan (2008): Testing Systems Specified as Partial Order Input/Output Automata. In: Proceedings of the 20th IFIP TC 6/WG 6.1 International Conference on Testing of Software and Communicating Systems: 8th International Workshop, TestCom '08 / FATES '08. Springer-Verlag, Berlin, Heidelberg, pp. 169–183, doi:10.1007/978-3-540-68524-1-13.
  8. D.V. Chieu & D.V. Hung (2012): Timed Traces and Their Applications in Specification and Verification of Distributed Real-time Systems. In: Proceedings of the Third Symposium on Information and Communication Technology, pp. 31–40, doi:10.1145/2350716.2350723.
  9. M. Chupilko & A. Kamkin (2011): A TLM-Based Approach to Functional Verification of Hardware Components at Different Abstraction Levels. In: Proceedings of the 12th Latin-American Test Workshop, pp. 1–6, doi:10.1109/LATW.2011.5985902.
  10. E.M. Clarke, O. Grumberg & D.A. Peled (1999): Model Checking. The MIT Press.
  11. R.M. Hierons, K. Bogdanov, J.P.Bowen, R. Cleaveland, J. Derrick, J. Dick, M. Gheorghe, M. Harman, K. Kapoor, P. Krause, G. Lüttgen, A.J.H. Simons, S. Vilkomir, M.R. Woodward & H. Zedan (2009): Using Formal Specifications to Support Testing. ACM Computing Surveys 41(2), pp. 9:1–9:76, doi:10.1145/1459352.1459354.
  12. V.P. Ivannikov, A.S. Kamkin, A.S. Kossatchev, V.V. Kuliamin & A.K. Petrenko (2007): The Use of Contract Specifications for Representing Requirements and for Functional Testing of Hardware Models. Programming and Computer Software 33(5), pp. 272–282, doi:10.1134/S0361768807050039.
  13. V. Kuliamin, A. Petrenko, N. Pakoulin, A. Kossatchev & I. Bourdonov (2003): Integration of Functional and Timed Testing of Real-Time and Concurrent Systems. In: M. Broy & A. Zamulin: Perspectives of System Informatics, Lecture Notes in Computer Science 2890. Springer Berlin Heidelberg, pp. 450–461, doi:10.1007/978-3-540-39866-0-45.
  14. W.K. Lam (2005): Hardware Design Verification: Simulation and Formal Method-Based Approaches. Prentice Hall.
  15. J. Laski & W. Stanley (2009): Software Verification and Analysis: An Integrated, Hands-On Approach. Springer.
  16. M. Leucker (2000): On Model Checking Synchronised Hardware Circuits. In: Proceedings of the 6th Asian Computing Science Conference, Lecture Notes in Computer Science 1961. Springer, pp. 182–198, doi:10.1007/3-540-44464-5_14.
  17. G. Luo, R. Dssouli, G. von Bochmann, P. Venkataram & A. Ghedamsi (1993): Generating Synchronizable Test Sequences Based On Finite State Machine with Distributed Ports. In: Proceedings of the IFIP Sixth International Workshop on Protocol Test Systems, pp. 53–68.
  18. A. Mazurkiewicz (1987): Trace Theory. In: Advances in Petri Nets 1986, Part II on Petri Nets: Applications and Relationships to Other Models of Concurrency. Springer-Verlag New York, Inc., New York, NY, USA, pp. 279–324, doi:10.1007/3-540-17906-2_30.
  19. B. Patel (2010): A Monitor-Based Approach to Verification. EE Times.
  20. V.R. Pratt (1984): The Pomset Model of Parallel Processes: Unifying the Temporal and the Spatial. In: Seminar on Concurrency, pp. 180–196, doi:10.1007/3-540-15670-4_9.
  21. K. Sen & G. Rosu (2003): Generating Optimal Monitors for Extended Regular Expressions. Electronic Notes in Theoretical Computer Science 89(2), pp. 162–181, doi:10.1016/S1571-0661(04)81051-X.
  22. B. Wile, J. Goss & W. Roesner (2005): Comprehensive Functional Verification: The Complete Industry Cycle. Morgan Kaufmann.

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