Robustness Analysis for Value-Freezing Signal Temporal Logic

L. Brim
(Masaryk University)
T. Vejpustek
(Masaryk University)
D. Šafránek
(Masaryk University)
J. Fabriková
(Masaryk University)

In our previous work we have introduced the logic STL*, an extension of Signal Temporal Logic (STL) that allows value freezing. In this paper, we define robustness measures for STL* by adapting the robustness measures previously introduced for Metric Temporal Logic (MTL). Furthermore, we present an algorithm for STL* robustness computation, which is implemented in the tool Parasim. Application of STL* robustness analysis is demonstrated on case studies.

In Thao Dang and Carla Piazza: Proceedings Second International Workshop on Hybrid Systems and Biology (HSB 2013), Taormina, Italy, 2nd September 2013, Electronic Proceedings in Theoretical Computer Science 125, pp. 20–36.
Published: 27th August 2013.

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