Published: 8th December 2013 DOI: 10.4204/EPTCS.137 ISSN: 2075-2180 |
PLACES 2013 (full title: Programming Language Approaches to Concurrency- and Communication-cEntric Software) was the sixth edition of the PLACES workshop series. After the first PLACES, which was affiliated to DisCoTec in 2008, the workshop has been part of ETAPS every year since 2009 and is now an established part of the ETAPS satellite events. This year, PLACES was the best attended workshop at ETAPS 2013.
The workshop series was started in order to promote the application of novel programming language ideas to the increasingly important problem of developing software for systems in which concurrency and communication are intrinsic aspects. This includes software for multi- and many-core systems, accelerators and large-scale distributed and/or service-oriented systems. The scope of PLACES includes new programming language features, whole new programming language designs, new type systems, new semantic approaches, new program analysis techniques, and new implementation mechanisms.
This year’s call for papers attracted 15 submissions, from which the programme committee selected 10 papers for presentation at the workshop. Each paper was reviewed by three PC members, in one case making use of an additional sub-reviewer. The PC then discussed the papers and their reviews in order to produce the final list of accepted papers. We used EasyChair for the whole process, which, as always, made everything very straightforward.
The number of submissions was similar to previous years, which is an indication of a healthy workshop. The selection process was difficult: some of the rejected papers could have been included if more time had been available for presentations, but we were reluctant to compress the schedule too much; allowing plenty of time for discussion is essential for a successful workshop.
We were very pleased to be able to offer an invited talk from Stefan Möhl of Mitrionics, and we are very grateful to Mitrionics for paying his travel expenses. The invited talk and the contributed talks together made PLACES 2013 again a success, with 50 registered attendants.
We would like to thank the programme committee members for their hard work, and the ETAPS workshop chairs and local organizers for their help.
August 2013 | Wim Vanderbauwhede Nobuko Yoshida |
Programme Committee Co-Chairs |
Wim Vanderbauwhede | University of Glasgow, UK |
Nobuko Yoshida | Imperial College London, UK |
Alastair Beresford | University of Cambridge, UK |
Viviana Bono | Universita di Torino, Italy |
Alastair Donaldson | Imperial College London, UK |
Dan Ghica | University of Birmingham, UK |
Joshua Guttman | Worcester Polytechnic Institute, MA, US |
Thomas Hildebrandt | IT University of Copenhagen, Denmark |
Paul Keir | Codeplay Ltd, UK |
Hans-Wolfgang Loidl | Heriot-Watt University, UK |
Conor McBride | University of Strathclyde, UK |
Jeremy Singer | University of Glasgow, UK |
Sven-Bodo Scholz | Heriot-Watt University, UK |
Nikhil Swamy | Microsoft Research, US |
Hugo Torres Vieira | Universidade de Lisboa, Portugal |
Alastair Beresford | University of Cambridge, UK |
Simon Gay | University of Glasgow, UK |
Alan Mycroft | University of Cambridge, UK |
Vasco Vasconcelos | University of Lisbon, Portugal |
Nobuko Yoshida | Imperial College London, UK |
The performance increase of desktop computers has markedly slowed down compared to before the year 2000. The value of added cores does not match the value that doubled clock speed used to give. Though Moore's law continues unabated, software is no longer able to leverage the added potential. This lack of performance increase might even be the primary cause of the decline in PC sales: Without a performance increase, there is little reason to replace your old PC with a new one.
It seems that there are few things more important in modern language design than solving the problem of parallel programming, possibly even at the cost of programmability. If recapturing the free lunch of continuous performance increases can be achieved, it may well be worth taking a few steps back in programmability.
Chip design is inherently fully parallel. In contrast to software, where each instruction uses the hardware in turn, a chip design has logic physically laid out for every operation that will be performed by the chip. This means that every operation on a chip runs simultaneously. Would it be possible to leverage the techniques for managing the huge parallelism of hardware design for software development?