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CPU Architecture (cont)

Other common kinds of instructions (not from any real machine)
  • add  Register1, Register2, Register3    (similarly for  sub,  mul,  div)
    • Register3 = Register1 + Register2
  • and  Register1, Register2, Register3    (similarly for  or,  xor)
    • Register3 = Register1 & Register2
  • neg  Register1, Register2
    • Register2 = ~ Register1
  • shiftl  Register1, Value, Register2    (similarly for  shiftr)
    • Register2 = Register1 << Value
  • syscall Value
    • invoke a system service; which service determined by Value