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Mutual Exclusion Techniques
Mutual Exclusion Techniques
Spin locks
Spin lock busy-waits until lock is released:
Alternative: Conditional lock
More appropriate mutex primitive:
Multiprocessor spin lock:
Multireader locks:
Dangers of Locking: Priority Inversion
Solution: Priority inheritance
Wait-free synch. of long critical sections:
Alternative: Lock-free synchronisation:
What to lock?
All but giant locks can lead to deadlocks!
Locking: Performance Considerations
Illustrative example
Result for 4-CPU system
Summary of results:
Effects of Memory Architecture
Example: end of a critical section
Memory Models: Strong Ordering
Other Memory Models
Total Store Ordering
Total store ordering breaks Decker:
Partial store ordering
Cache Consistency
Hardware cache coherency
Write-through invalidate protocol
Write-once protocol
Write-once state diagram:
MESI protocol
Write-invalidate protocols:
H/W cache coherency issues
Non-Uniform Memory Architecture (NUMA)
Cache-coherent NUMA (cc-NUMA):
SMP Scheduling
How schedule a multiprocessor?
Scheduler organisation
Issues: Address-space distribution
Gang scheduling (co-scheduling):
Fixed processor assignment
Real-time OS Issues
Simplified Real-Time Process Model
Example
More flexible alternative: Use priorities
Schedulability
Sporadic (Non-Periodic) Processes
Issues
Bibliography
About this document ...
Gernot Heiser 2002-10-11
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