Tutorial Week 2

Questions and Answers

Computer Architecture

Q1: What are some of the differences between a processor running in privileged mode (also caled kernel mode) and user mode? Why are the two modes needed?

In user-mode:

• CPU control registers are inaccessible.
• CPU management instructions are inaccessible.
• Part's of the address space (containing kernel code and data) are inaccessible.
• Some device memory and registers (or ports) are inaccessible.

The two modes of operation are required to ensure that applications (running in user-mode) cannot bypass, circumvent, or take control of the operating system.

Q2: Describe the memory hierarchy. What types of memory appear in it? What are the characteristics of the memory as one moves through the hierarchy? How can do memory hierarchies provide both fast access times and large capacity?

The memory hierarchy is a hierarchy of memory types composed such that if data is not accessible at the top of the hierarchy, lower levels of the hierarchy are accessed until the data is found, upon which a copy (usually) of the data is moved up the hierarchy for access.

Registers, cache, main memory, magnetic disk, CDROM, tape are all types of memory that can be composed to form a memory hierarchy.

In going from the top of the hierarchy to the bottom, the meory types feature decreasing cost per bit, increasing capacity, but also increasing access time.

As we move down the hierarchy, data is accessed less frequently, i.e. frequently accessed data is at the top of the hierarchy. The phenomenon is called "locality" of access, most accesses are to a small subset of all data.

Q3: Given that disks can stream data quite fast (1 block in tens of microseconds), why are average access times for a block in milliseconds?

Seek times are in milliseconds (e.g. .5 millisecond track to track, 8 millisecond inside to outside), and rotational latency (1/2 rotation) is in milliseconds (e.g. 2 milliseconds for 15,000rpm disk).

Q4: You have a choice of buying a 3 Ghz processor with 512K cache, and a 2 GHz processor (of the same type) with a 3 MB cache for the same price. Assuming memory is the same speed in both machines and is much less than 2GHz (say 400MHz). Which would you purchase and why? Hint: You should consider what applications you expect to run on the machine.

If you are only running an small application (or a large one, that accesses only a small subset), then the 3GHz processor will be much faster. If you are running a large application access a larger amount of memory than 512K but generally less than 3MB, the 2GHz processor should be faster as the 3 GHz processor will be limited by memory speed.

Q5: Cache memory is divided into (and loaded in) blocks (also called cache lines). Why divide the cache into cache lines? What might limit the size of a line? You can ignore implementation issues of the cache itself.

Caches are loaded in lines to improve memory bus bandwidth via burst transfer. Compare the number of transaction on a bus for accessing 4 words with 1-word lines and 4-word lines. 1 word: ADADADAD (where A equals address phase, D equals data phase of a bus transaction), 4 word: ADDDD.

Larger lines also load more memory on a cache miss, so given locality of access, larger lines prefetch more memory that is likely to be used in the future.

There is a limit on increasing the lines size as when a line is loaded, one must evict an existing line to make space. When the probability of the evicted line being reused becomes greater than the probability of using the other words in the newly loaded cache line, the line size is too big for that application.

Aside: cache line size is fixed in hardware by computer makers, so computer architects must take great care in choosing a line size appropriate for the majority of applications.

Operating System Intro

Q6: What are the two main responsibilities or identifying features of an Operating System?

1) It provides a high-level abstract machine for programmers (hides the details of the hardware)
2) It is a resource manager that divides resources amongst competing programs or users according to some system policy.

Q7: What are the characteristics of a good operating system?

A good operating system allows users to fairly, reliably, and efficiently utilise the hardware it runs on.

Q8: Which of the following instructions (or instruction sequences) should only be allowed in kernel mode?

1. Disable all interrupts.
2. Read the time of day clock.
3. Set the time of day clock.
4. Change the memory map.
5. Write to the hard disk controller register.
6. Write all buffered blocks associated with a file back to disk (fsync).

1,3,4,5 need to be restricted to kernel mode.

Q9: On UNIX, which of the following are considered system calls? Why?

1. read()
2. printf()
3. memcpy()
4. open()
5. strncpy()

1 and 4 are system calls, 2 is a C library functions which can call write(), 3 and 5 a simply library functions.

MIPS R3000 Questions

Q10: What is a branch delay?

The pipeline structure of the MIPS CPU means that when a jump instruction reaches the "execute" phase and a new program counter is generated, the instruction after the jump will already have been decoded. Rather than discard this potentially useful work, the architecture rules state that the instruction after a branch is always executed before the instruction at the target of the branch.

Q11: What is the EPC register? What is it used for?

This is a 32-bit register containing the 32-bit address of the return point for the last exception. The instruction causing (or suffering) the exception is at EPC, unless BD is set in Cause, in which case EPC points to the previous (branch) instruction.

It is used by the exception handler to restart execution at the at the point where execution was interrupted.

Q12: What happens to the KUc and IEc bits in the STATUS register when an exception occurs? Why? How are they restored?

The 'c' (current) bits are shifted into the corresponding 'p' (previous) bits, after which KUc = 0, IEc = 0 (kernel mode with interrupts disabled). They are shifted in order to preserve the current state at the point of the exception in order to restore that exact state when returning from the exception.

They are restored via a rfe instruction (restore from exception).

General Questions

Q13: Compute the effective access time of the following memory hierarchy. The first level consists of accessing an entire disk block cached in main memory. It takes 10 microseconds to copy the disk block from the main memory block cache to the application. The second level of the hierarchy is the hard disk itself which takes 4 milliseconds on average to locate a block on disk and copy it to the main memory block cache. Assume a hit rate of 90% in the disk block cache.

.9 * 10us + .1 (10us + 4ms) = 410us

Page last modified: 11:24pm on Friday, 13th of March, 2009

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